Undergrad Intern - Design Automation | Intern in Job Job at Intel in Santa Clara CA | 7265415550

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Undergrad Intern - Design Automation

Location:

Santa Clara, CA

Description:

Job Description Role and Responsibilities: Your responsibilities will include but are not limited to: Logic design using Verilog and VCS Ensuring the logical design of a microprocessor satisfies the architectural specification Creating and optimizing the validation environment, tools and methodologies Developing or using checking software to compare model behavior against a specification Writing software to provide controllability and observability into the architectural model Utilize AI in targeted areas to improve designs In addition to the qualifications listed below, the ideal candidate will also have the following: Excellent communication skills Teamwork skills Strong analytical and problem-solving skills Willingness to work independently and at various levels of abstraction Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate must be pursuing a Bachelor in Electrical Engineering, Computer Engineering, Computer Science, or a related field. 6+ months of coursework in: Digital design Computer architecture Object-oriented programming Preferred Qualifications Pre- or post-silicon ASIC verification/validation OVM and UVM methodologies Verilog and System Verilog Scripting languages such as Python or Perl Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Other Locations US, TX, Austin; US, AZ, Phoenix; US, CA, Folsom; US, MA, Hudson Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $40,000.00-$108,000.00 (Hourly Role)*Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0258179pca3lyuhf

Company:

Intel

Posted:

May 10 on ITJobsWeb

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